QpiAI Kaveri: India’s 64-Qubit Processor

QpiAI Kaveri: India’s 64-Qubit Processor

QpiAI Kaveri: India’s 64-Qubit Processor and the Rise of an Indigenous Quantum-Computing Ecosystem

The processor uses superconducting transmon qubits, one of the leading hardware approaches in contemporary quantum computing. Transmons are fabricated as microscopic electrical circuits containing superconducting components and Josephson junctions.

India’s quantum-computing programme has entered a new phase with the development of Kaveri, a 64-qubit superconducting quantum processor created by Bengaluru-based deep-technology company QpiAI. Unveiled in November 2025, Kaveri has been described by QpiAI and government publications as the most powerful indigenous quantum processor developed in India to date. The chip represents a major increase from QpiAI’s earlier 25-qubit Indus system and places the company within the 50-to-100-physical-qubit range targeted during the intermediate stages of India’s National Quantum Mission.

Kaveri is designed around 64 superconducting quantum bits, or qubits, that function at extremely low temperatures. Unlike conventional bits, which store information as either zero or one, qubits can be prepared in quantum states involving combinations of zero and one. When qubits are connected through quantum gates and entanglement, they can represent and manipulate highly complex probability distributions. This creates the possibility of developing specialised algorithms for molecular simulation, materials research, optimisation and other problems that become difficult for classical computers as their size grows.

The processor uses superconducting transmon qubits, one of the leading hardware approaches in contemporary quantum computing. Transmons are fabricated as microscopic electrical circuits containing superconducting components and Josephson junctions. They are operated inside dilution refrigerators at temperatures measured in millikelvin, placing them close to absolute zero. QpiAI’s earlier Indus system uses a closed-cycle cryostat with a base temperature of approximately 10 millikelvin, together with microwave-control electronics, signal filters, cryogenic amplifiers and a shielded quantum-processor package.

The Architecture Behind Kaveri

One of Kaveri’s most important features is its flip-chip integrated architecture. In a conventional planar quantum chip, qubits, control connections, resonators and readout structures compete for space on the same layer. As the number of qubits increases, routing control signals across this surface becomes increasingly difficult and can introduce interference, signal loss and unwanted interactions.

QpiAI’s approach separates the qubit layer from parts of the interconnect and control architecture. The two layers are manufactured separately and joined face-to-face through microscopic connections. According to the company, this allows higher qubit density, shorter low-loss interconnections and greater flexibility in arranging control and readout systems. It also creates a pathway towards three-dimensional integration, where quantum processors may eventually be constructed from several interconnected layers rather than a single crowded surface.

The company’s published roadmap classifies Kaveri as a 64-qubit Noisy Intermediate-Scale Quantum, or NISQ, processor. It lists a two-dimensional square-lattice arrangement with three-dimensional integration, a target coherence time of 100 microseconds, surface-code support and a listed error-rate target of around 10210^{-2}10−2. These figures should be understood as company-published specifications and targets. Complete independently verified benchmark data covering gate fidelities, readout accuracy, circuit depth, processor yield and performance across all 64 qubits has yet to be published in a peer-reviewed technical paper.

Coherence time measures how long a qubit can preserve useful quantum information before environmental noise destroys its state. A longer coherence period allows more quantum-gate operations to be completed before the result becomes unreliable. The practical power of a processor therefore depends on the interaction of several characteristics, including qubit quality, gate fidelity, connectivity, calibration stability, readout accuracy, circuit-execution speed and the software used to map algorithms onto the hardware.

Why 64 Qubits Matter—and What They Do Not Automatically Prove

Kaveri’s 64-qubit scale is significant because it moves Indian-built superconducting hardware into a range where classical simulation becomes increasingly demanding. A system of 64 ideal qubits mathematically occupies a state space described by 2642^{64}264 complex amplitudes. Tracking an arbitrary quantum state of that size through conventional brute-force simulation can require enormous memory and computing power.

Crossing 50 physical qubits, however, does not automatically mean that a processor can outperform every classical supercomputer. IBM’s quantum-computing guidance states that qubit count alone is insufficient for comparing quantum systems; quality, connectivity, error rates, processing speed and the depth of circuits that can be executed reliably are equally important.

Google’s 2019 quantum-advantage experiment used 53 functioning superconducting qubits to perform a carefully designed random-circuit-sampling task. Its result depended on the processor’s circuit arrangement, calibration, gate fidelities and ability to execute a sufficiently deep quantum circuit. The demonstration established an advantage for one specialised sampling problem rather than general superiority across ordinary scientific or commercial computing.

Kaveri’s 64 physical qubits therefore place it in an important experimental class, while practical quantum advantage must still be demonstrated through transparent workloads and reproducible comparisons against the best classical methods. Useful assessment would require published results showing the problem solved, circuit depth, total runtime, error-mitigation method, accuracy and the performance of the strongest classical alternative.

From Indus to Kaveri

Kaveri builds on the foundation created by QpiAI-Indus, a 25-superconducting-qubit system announced on World Quantum Day in April 2025. The Department of Science and Technology described Indus as India’s first full-stack quantum-computing system, combining a quantum processor with scalable control electronics, optimised software, classical high-performance computing and AI-enhanced applications.

A full-stack quantum computer contains far more than the quantum chip. It requires a dilution refrigerator, microwave-control and readout electronics, pulse-generation systems, amplifiers, calibration tools, a compiler, software libraries, workload-management systems and classical computers that prepare circuits and process measurement results. QpiAI’s Indus architecture includes classical Intel Xeon processors, GPU support, high-speed networking, cloud or on-premise application interfaces and a data-centre manager designed to coordinate quantum and classical workloads.

This hybrid architecture is important because present-day quantum machines operate as specialised accelerators rather than independent replacements for conventional computers. A classical system prepares the problem, optimises the quantum circuit, communicates instructions to the processor and analyses the measurements returned by the qubits. In many experimental applications, the classical computer repeatedly modifies the parameters of a quantum circuit until a satisfactory result is obtained.

In March 2026, QpiAI announced that it had received a contract to install a 25-qubit Indus system at the Quantum and AI Computing Centre of Excellence at IIIT Dharwad, with joint access for IIIT Raichur. The company described it as its second quantum-computing deployment in Karnataka and said the installation would support academic research, training and commercial workloads. The announcement concerned a contracted installation, so it should be distinguished from confirmation that the system had already entered full routine operation.

Such deployments are central to building a domestic user community. India’s quantum programme requires physicists and hardware engineers alongside algorithm developers, chemists, pharmaceutical researchers, materials scientists, cybersecurity specialists and industrial users capable of identifying problems suited to quantum methods. Installing machines at universities allows researchers to work with the limitations of real hardware rather than relying entirely on idealised simulators.

Progress Towards Quantum Error Correction

The principal obstacle confronting quantum computing is error. Qubits are extremely sensitive to heat, electromagnetic radiation, vibration, fabrication defects and interference from surrounding components. Gate operations and measurements introduce additional errors, causing the quality of a calculation to decline as circuits become wider and deeper.

Quantum error correction addresses this problem by encoding one reliable logical qubit across several physical qubits. Errors are detected indirectly through repeated measurements of associated stabiliser circuits, allowing a decoder to determine the most likely correction without directly measuring and destroying the quantum information being protected.

In March 2026, QpiAI announced that it had demonstrated a high-speed hardware decoder operating with the 64-qubit Kaveri platform. The company said the system achieved sub-microsecond decoding latency and supported distance-five rotated surface codes. This represents progress towards real-time error correction because the decoder must process error information faster than errors accumulate during quantum operations. The result currently rests primarily on company announcements rather than a complete independent peer-reviewed evaluation.

Kaveri should still be understood as a 64-physical-qubit NISQ processor rather than a machine containing 64 error-corrected logical qubits. QpiAI’s own published roadmap separates its NISQ processors from its fault-tolerant programme. It lists Yukti, targeting one logical qubit, for the fourth quarter of 2026; Shakti, with five logical qubits, for 2027; Pragati, with 20 logical qubits, for 2028; and Unnati, targeting 100 logical qubits, for 2030.

A February 2026 government statement described QpiAI’s 64-qubit QPU as scalable and fault-tolerant. The company’s more detailed technical roadmap provides a useful qualification: Kaveri supports technologies associated with fault-tolerant development, while fully error-corrected logical machines form a separate future product line.

Commercial Release and Access

QpiAI announced that Kaveri would become commercially available by the third quarter of 2026 for government organisations, research institutions and businesses. As of July 22, 2026, the company’s public newsroom continues to describe the machine through that planned commercial-availability schedule. A subsequent announcement confirming broad general availability, final pricing or completed customer installations has yet to appear on the publicly accessible newsroom.

Commercial access could take several forms. Institutions may purchase or co-invest in an on-premise machine, contract dedicated access at a QpiAI facility or submit workloads through a quantum-computing-as-a-service platform. QpiAI already promotes early quantum-cloud access for Indus and provides interfaces for connecting quantum hardware with cloud and on-premise applications.

In July 2026, the company also announced that it had made its quantum software-development kit open source. An accessible SDK can help researchers construct circuits, test algorithms and develop applications without depending entirely on proprietary internal tools. Its long-term value will depend on documentation quality, compatibility, community adoption and access to functioning QpiAI hardware.

Potential Applications

The most scientifically promising use of quantum processors lies in simulating quantum systems themselves. Molecules and materials are governed by quantum mechanics, while their exact electronic behaviour can become extremely difficult to calculate on classical machines. Quantum processors may eventually assist researchers in estimating molecular energies, reaction pathways, catalyst behaviour and material properties.

In drug discovery, quantum methods could contribute to modelling molecular interactions, screening chemical structures and optimising candidate molecules. Current NISQ hardware remains too noisy and small to replace classical computational chemistry or laboratory testing. Kaveri can instead serve as a research platform for developing hybrid algorithms and testing whether particular molecular subproblems can benefit from quantum processing.

Materials science offers similar possibilities. Researchers could explore battery materials, superconductors, catalysts, semiconductors and compounds used in clean-energy technologies. Classical high-performance computing, AI-based prediction and quantum processors can be combined, with each system handling the part of the problem best suited to its architecture.

Optimisation is another major area of interest. Logistics networks, vehicle routing, industrial scheduling, portfolio construction, telecommunications and energy-grid management involve searching through very large combinations of possible decisions. Quantum algorithms may help explore these solution spaces, although many current quantum-optimisation experiments continue to compete with highly mature classical solvers.

Climate science has also been cited as a potential field, particularly for energy-system optimisation, materials development and selected mathematical subproblems. A 64-qubit NISQ processor cannot replace the supercomputers used for complete global-climate simulations. Its nearer-term role would involve experimental algorithms working alongside classical modelling infrastructure.

Cybersecurity requires similar precision. Kaveri does not possess the number of error-corrected logical qubits needed to break widely deployed public-key encryption. The strategic concern arises from future large-scale fault-tolerant computers capable of running algorithms such as Shor’s algorithm. Current processors can support research, training and the development of quantum-safe migration strategies, while governments and companies prepare cryptographic systems for a future quantum threat.

Government Support Through the National Quantum Mission

QpiAI is one of the startups selected for support under India’s National Quantum Mission, coordinated by the Department of Science and Technology. The mission was approved in April 2023 with an outlay of ₹6,003.65 crore for the period from 2023–24 to 2030–31. It seeks to develop domestic capacity in quantum computing, communication, sensing, metrology, materials and device fabrication.

The mission’s computing roadmap calls for systems containing 20–50 physical qubits within three years, 50–100 physical qubits within five years and 50–1,000 physical qubits within eight years across platforms including superconducting and photonic technologies. Kaveri’s 64-qubit scale places QpiAI within the mission’s intermediate target range ahead of the programme’s final 1,000-qubit ambition.

The government is also establishing quantum-hardware and fabrication facilities at institutions including the Indian Institute of Science, IIT Bombay, IIT Kanpur and IIT Delhi. Shared infrastructure is important because quantum development requires specialised fabrication, materials analysis, cryogenics, precision electronics and clean-room facilities that remain too costly for many individual research groups and startups.

Funding and Expansion Roadmap

QpiAI announced a US$32-million, approximately ₹279-crore, Series A funding round in July 2025 led by Avataar Ventures and the National Quantum Mission, with participation from existing and additional investors. The capital was intended to support hardware development, manufacturing, commercial deployment and international expansion.

The company’s current NISQ roadmap lists Ganges as a 128-qubit processor targeted for the first quarter of 2027 and Everest as a 1,000-qubit processor targeted for the first quarter of 2028. This differs from some earlier reports that placed the 1,000-qubit goal around 2030. QpiAI’s current 2030 target concerns Unnati, a separate fault-tolerant system planned to contain 100 logical qubits. Physical-qubit and logical-qubit roadmaps should therefore be reported separately.

Increasing the number of qubits from 64 to 128 and eventually 1,000 will require progress in fabrication yield, cryogenic wiring, control electronics, calibration automation, gate fidelity and error correction. A processor containing more qubits delivers limited value when noise prevents it from executing sufficiently deep circuits. QpiAI’s greater challenge will therefore be improving quality and reliability while expanding scale.

Kaveri The Big Leap for India

Kaveri’s importance extends beyond the number 64. The project demonstrates domestic capability across processor design, superconducting hardware, cryogenic integration, control electronics, software, high-performance computing and application development. These capabilities reduce dependence on foreign cloud platforms and give Indian researchers greater control over hardware access, calibration data and experiments.

Domestic quantum hardware also carries strategic significance. Quantum computing involves specialised knowledge, sensitive fabrication processes and supply chains that may become increasingly important in national security, advanced materials, communications and pharmaceuticals. Building an indigenous ecosystem gives India the ability to train engineers, retain intellectual property and shape standards as the technology matures.

Kaveri remains an early-stage NISQ processor rather than a universal fault-tolerant quantum computer. Its commercial success will depend on measured performance, uptime, customer access, software maturity, technical support and the ability to demonstrate useful results. Public release of detailed benchmarks and independent validation would allow the scientific community to assess its capabilities more accurately.

Even with these qualifications, Kaveri represents a substantial step in India’s quantum journey. Indus established the country’s first integrated 25-qubit full-stack platform, while Kaveri expands the hardware to 64 qubits and introduces a more scalable flip-chip architecture. The planned progression towards Ganges, Everest and error-corrected logical processors shows that QpiAI is attempting to build an entire domestic quantum-computing family rather than a single experimental chip.


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