IIT Delhi Develops India’s First Indigenous Micro-GPU for Embedded Graphics Systems

Researchers at the Indian Institute of Technology Delhi have developed what is being described as India’s first functioning indigenous micro-Graphics Processing Unit, or micro-GPU, creating a home-grown programmable graphics architecture designed primarily for embedded and low-cost computing applications.

Developed within IIT Delhi’s Department of Electrical Engineering, the project was led by M.Tech students Nammi Akash and M. Ravi Teja under the supervision of Professors Jayadeva and Kaushik Saha. The team has demonstrated programmable graphics rendering using a custom floating-point GPU engine implemented entirely in Register Transfer Language and deployed on a Spartan-7 Field Programmable Gate Array platform.

The achievement is significant because graphics-processing hardware remains an area in which India depends heavily on foreign intellectual property and imported processor architectures. Rather than attempting to compete immediately with large commercial GPUs used for artificial intelligence or high-end gaming, the IIT Delhi team has focused on a compact programmable architecture suitable for embedded displays, industrial systems and affordable digital devices.

A Programmable GPU Built From the Ground Up

The micro-GPU has been designed as a programmable graphics processor rather than a fixed-function display controller. Its floating-point processing engine allows graphics operations to be performed through hardware that the researchers designed themselves at the RTL level.

Register Transfer Language is used to describe the behaviour of digital hardware before it is physically fabricated as a chip. By developing the architecture at this level, the IIT Delhi team has created intellectual property that can potentially be implemented either on programmable FPGA hardware or converted into an Application-Specific Integrated Circuit.

The current demonstration uses a Spartan-7 FPGA, allowing the researchers to test the graphics architecture without immediately undertaking the far more expensive process of manufacturing a custom silicon chip. FPGA implementation also gives the team greater flexibility to modify and optimise the processor as the architecture develops.

Designed for Embedded and Affordable Applications

The project has been conceived around practical embedded systems rather than high-performance desktop graphics.

The researchers identify industrial control displays, low-cost human-machine interfaces, e-rickshaw dashboard navigation systems, inland-water navigation terminals for small fishing vessels and educational e-book readers among the possible applications for the technology.

These systems generally do not require the enormous computational power available from modern commercial GPUs. They instead require compact, energy-efficient and inexpensive graphics hardware capable of generating useful displays and interfaces while operating within restricted power and cost limits.

This creates an area where indigenous processor intellectual property could have practical value. A small programmable GPU that can be integrated with Indian-designed embedded systems could reduce dependence on imported graphics solutions in applications where extremely high performance is unnecessary.

The Architecture Can Move From FPGA to Silicon

One of the important characteristics of the IIT Delhi design is that it is not restricted to the FPGA platform on which it has been demonstrated.

The underlying architecture can potentially be transferred into a dedicated silicon implementation. Such a transition would allow the design to become part of an ASIC, enabling smaller size, lower power consumption and better performance than would generally be possible using an FPGA implementation.

Akash and Ravi Teja said their objective was to develop a compact but genuinely programmable graphics-processing architecture that could first operate on an FPGA and later be realised as a dedicated chip.

The researchers also see the project as potentially supporting affordable digital-access platforms, particularly where imported graphics hardware or licensing costs could make products more expensive.

Next Step: An 8 to 16-Core Vector Graphics Processor

The present micro-GPU represents the first stage of a considerably larger development programme.

The team now plans to expand the architecture into an eight to sixteen-core vector-style graphics processor. Such a design would provide substantially greater parallel-processing capability while retaining the focus on embedded applications.

The researchers also intend to develop an optimised compiler and graphics software toolchain. This will be essential because a programmable processor becomes far more useful when developers can write software for it without working directly with low-level hardware instructions.

The combination of processor architecture, compiler development and graphics software would move the project closer to becoming a complete indigenous computing platform rather than remaining primarily a hardware research demonstrator.

65-Nanometre ASIC Is the Planned Silicon Target

The IIT Delhi team ultimately intends to migrate the processor into a proof-of-concept ASIC fabricated using a 65-nanometre process node.

A 65nm process is considerably older than the advanced nodes used in modern flagship GPUs and smartphones, but that does not make it unsuitable for the intended applications. Embedded controllers, industrial electronics, display processors and many other specialised chips often do not require cutting-edge semiconductor manufacturing processes.

Using a mature process could also make development more economical while allowing the researchers to demonstrate that the architecture can successfully transition from programmable FPGA hardware into a dedicated silicon implementation.

If completed, such a chip would provide an important proof of concept for indigenous programmable graphics hardware developed around Indian intellectual property.

Building More Than a Graphics Processor

The project also carries an important educational dimension because building even a relatively small programmable GPU requires knowledge from several engineering disciplines.

Students involved in such work must understand arithmetic hardware, computer architecture, digital circuit design, programmable processors, embedded systems and software compilation. Bringing these areas together in a functioning hardware platform requires considerably more than simply designing a graphics-output circuit.

Professor Kaushik Saha highlighted this integrated approach, noting that the project brings arithmetic hardware, programmable architectures, compilers and embedded-system thinking into a single development environment.

Professor Jayadeva similarly emphasised the research and educational potential of indigenous programmable graphics hardware, particularly when it can eventually support affordable computing platforms with practical social applications.

From Academic Prototype to Indigenous Processor IP

The larger importance of the project lies in the creation of processor intellectual property within India.

Modern electronic systems frequently depend upon processor cores, graphics engines and other hardware blocks licensed from international companies. Developing indigenous architectures allows Indian researchers and companies to understand and control more of the underlying technology rather than concentrating only on assembling systems built around externally developed processor designs.

The IIT Delhi micro-GPU remains a research-stage development and is not yet a commercial graphics chip. Significant engineering work will still be required before the technology can be integrated into mass-produced electronic systems.

The planned work on multicore processing, compiler development, graphics software and ASIC implementation will therefore determine how far the architecture can progress beyond its current FPGA demonstration.

Commercialisation Will Require the Next Round of Development

The research team plans to seek funding for ASIC development, system integration and eventual commercialisation.

Moving from an academic FPGA prototype to commercial silicon involves substantial additional work. The architecture must be verified, optimised for power and performance, converted into a manufacturable chip design and supported by software tools that allow application developers to use the processor effectively.

Commercial adoption would also require integration with display controllers, memory systems and other embedded hardware depending on the target application.

Even before that stage is reached, however, the functioning micro-GPU demonstrates that programmable graphics architecture can be designed and implemented within an Indian academic environment using indigenous hardware concepts.

For India’s growing semiconductor and processor-design ecosystem, that capability is important. The long-term objective is not simply to manufacture chips domestically, but also to develop the intellectual property, architectures and software stacks that determine what those chips can do.

IIT Delhi’s micro-GPU represents a small processor compared with the massive GPUs used in data centres and high-performance computing, but its significance lies elsewhere. It demonstrates the possibility of creating an Indian-designed programmable graphics processor, proving the architecture on FPGA hardware and establishing a pathway towards indigenous graphics silicon for practical embedded applications.

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References

The News Mill — IIT Delhi Develops India’s First Indigenous Micro-GPU, with ANI inputs, September 2026.

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